//Original:/testcases/core/c_dsp32shift_expadj_l/c_dsp32shift_expadj_l.dsp
// Spec Reference: dsp32shift expadj rl
# mach: bfin

.include "testutils.inc"
	start




imm32 r0, 0x00000000;
imm32 r1, 0x0000c001;
imm32 r2, 0x0000c002;
imm32 r3, 0x0000c003;
imm32 r4, 0x0000c004;
imm32 r5, 0x0000c005;
imm32 r6, 0x0000c006;
imm32 r7, 0x0000c007;
R1.L = EXPADJ( R1.L , R0.L );
R2.L = EXPADJ( R2.L , R0.L );
R3.L = EXPADJ( R3.L , R0.L );
R4.L = EXPADJ( R4.L , R0.L );
R5.L = EXPADJ( R5.L , R0.L );
R6.L = EXPADJ( R6.L , R0.L );
R7.L = EXPADJ( R7.L , R0.L );
R0.L = EXPADJ( R0.L , R0.L );
CHECKREG r0, 0x00000000;
CHECKREG r1, 0x00000000;
CHECKREG r2, 0x00000000;
CHECKREG r3, 0x00000000;
CHECKREG r4, 0x00000000;
CHECKREG r5, 0x00000000;
CHECKREG r6, 0x00000000;
CHECKREG r7, 0x00000000;

imm32 r0, 0x11001001;
imm32 r1, 0x11001001;
imm32 r2, 0x11001002;
imm32 r3, 0x11001003;
imm32 r4, 0x11001004;
imm32 r5, 0x11001005;
imm32 r6, 0x11001006;
imm32 r7, 0x11001007;
R0.L = EXPADJ( R0.L , R1.L );
R2.L = EXPADJ( R2.L , R1.L );
R3.L = EXPADJ( R3.L , R1.L );
R4.L = EXPADJ( R4.L , R1.L );
R5.L = EXPADJ( R5.L , R1.L );
R6.L = EXPADJ( R6.L , R1.L );
R7.L = EXPADJ( R7.L , R1.L );
R1.L = EXPADJ( R1.L , R1.L );
CHECKREG r0, 0x11001001;
CHECKREG r1, 0x11001001;
CHECKREG r2, 0x11001001;
CHECKREG r3, 0x11001001;
CHECKREG r4, 0x11001001;
CHECKREG r5, 0x11001001;
CHECKREG r6, 0x11001001;
CHECKREG r7, 0x11001001;

imm32 r0, 0x2000c001;
imm32 r1, 0x2000d001;
imm32 r2, 0x2000000f;
imm32 r3, 0x2000e003;
imm32 r4, 0x2000f004;
imm32 r5, 0x2000f005;
imm32 r6, 0x2000f006;
imm32 r7, 0x2000f007;
R0.L = EXPADJ( R0.L , R2.L );
R1.L = EXPADJ( R1.L , R2.L );
R3.L = EXPADJ( R3.L , R2.L );
R4.L = EXPADJ( R4.L , R2.L );
R5.L = EXPADJ( R5.L , R2.L );
R6.L = EXPADJ( R6.L , R2.L );
R7.L = EXPADJ( R7.L , R2.L );
R2.L = EXPADJ( R2.L , R2.L );
CHECKREG r0, 0x20000001;
CHECKREG r1, 0x20000001;
CHECKREG r2, 0x2000000B;
CHECKREG r3, 0x20000002;
CHECKREG r4, 0x20000003;
CHECKREG r5, 0x20000003;
CHECKREG r6, 0x20000003;
CHECKREG r7, 0x20000003;

imm32 r0, 0x30009001;
imm32 r1, 0x3000a001;
imm32 r2, 0x3000b002;
imm32 r3, 0x30000010;
imm32 r4, 0x3000c004;
imm32 r5, 0x3000d005;
imm32 r6, 0x3000e006;
imm32 r7, 0x3000f007;
R0.L = EXPADJ( R0.L , R3.L );
R1.L = EXPADJ( R1.L , R3.L );
R2.L = EXPADJ( R2.L , R3.L );
R4.L = EXPADJ( R4.L , R3.L );
R5.L = EXPADJ( R5.L , R3.L );
R6.L = EXPADJ( R6.L , R3.L );
R7.L = EXPADJ( R7.L , R3.L );
R3.L = EXPADJ( R3.L , R3.L );
CHECKREG r0, 0x30000010;
CHECKREG r1, 0x30000010;
CHECKREG r2, 0x30000010;
CHECKREG r3, 0x30000010;
CHECKREG r4, 0x30000010;
CHECKREG r5, 0x30000010;
CHECKREG r6, 0x30000010;
CHECKREG r7, 0x30000010;

imm32 r0, 0x40000000;
imm32 r1, 0x4000c001;
imm32 r2, 0x4000c002;
imm32 r3, 0x4000c003;
imm32 r4, 0x4000c004;
imm32 r5, 0x4000c005;
imm32 r6, 0x4000c006;
imm32 r7, 0x4000c007;
R0.L = EXPADJ( R1.L , R4.L );
R1.L = EXPADJ( R2.L , R4.L );
R2.L = EXPADJ( R3.L , R4.L );
R3.L = EXPADJ( R4.L , R4.L );
R5.L = EXPADJ( R5.L , R4.L );
R6.L = EXPADJ( R6.L , R4.L );
R7.L = EXPADJ( R7.L , R4.L );
R4.L = EXPADJ( R0.L , R4.L );
CHECKREG r0, 0x40000001;
CHECKREG r1, 0x40000001;
CHECKREG r2, 0x40000001;
CHECKREG r3, 0x40000001;
CHECKREG r4, 0x4000C004;
CHECKREG r5, 0x40000001;
CHECKREG r6, 0x40000001;
CHECKREG r7, 0x40000001;

imm32 r0, 0x51001001;
imm32 r1, 0x51001001;
imm32 r2, 0x51001002;
imm32 r3, 0x51001003;
imm32 r4, 0x51001004;
imm32 r5, 0x51001005;
imm32 r6, 0x51001006;
imm32 r7, 0x51001007;
R0.L = EXPADJ( R0.L , R5.L );
R1.L = EXPADJ( R2.L , R5.L );
R2.L = EXPADJ( R3.L , R5.L );
R3.L = EXPADJ( R4.L , R5.L );
R4.L = EXPADJ( R5.L , R5.L );
R6.L = EXPADJ( R6.L , R5.L );
R7.L = EXPADJ( R7.L , R5.L );
R5.L = EXPADJ( R1.L , R5.L );
CHECKREG r0, 0x51000002;
CHECKREG r1, 0x51000002;
CHECKREG r2, 0x51000002;
CHECKREG r3, 0x51000002;
CHECKREG r4, 0x51000002;
CHECKREG r5, 0x51001005;
CHECKREG r6, 0x51000002;
CHECKREG r7, 0x51000002;

imm32 r0, 0x6000c001;
imm32 r1, 0x6000d001;
imm32 r2, 0x6000000f;
imm32 r3, 0x6000e003;
imm32 r4, 0x6000f004;
imm32 r5, 0x6000f005;
imm32 r6, 0x6000f006;
imm32 r7, 0x6000f007;
R0.L = EXPADJ( R0.L , R6.L );
R1.L = EXPADJ( R1.L , R6.L );
R2.L = EXPADJ( R3.L , R6.L );
R3.L = EXPADJ( R4.L , R6.L );
R4.L = EXPADJ( R5.L , R6.L );
R5.L = EXPADJ( R6.L , R6.L );
R7.L = EXPADJ( R7.L , R6.L );
R6.L = EXPADJ( R2.L , R6.L );
CHECKREG r0, 0x60000001;
CHECKREG r1, 0x60000001;
CHECKREG r2, 0x60000002;
CHECKREG r3, 0x60000003;
CHECKREG r4, 0x60000003;
CHECKREG r5, 0x60000003;
CHECKREG r6, 0x6000F006;
CHECKREG r7, 0x60000003;

imm32 r0, 0x70009001;
imm32 r1, 0x7000a001;
imm32 r2, 0x7000b002;
imm32 r3, 0x70000010;
imm32 r4, 0x7000c004;
imm32 r5, 0x7000d005;
imm32 r6, 0x7000e006;
imm32 r7, 0x7000f007;
R0.L = EXPADJ( R0.L , R7.L );
R1.L = EXPADJ( R1.L , R7.L );
R2.L = EXPADJ( R2.L , R7.L );
R3.L = EXPADJ( R4.L , R7.L );
R4.L = EXPADJ( R5.L , R7.L );
R5.L = EXPADJ( R6.L , R7.L );
R6.L = EXPADJ( R7.L , R7.L );
R7.L = EXPADJ( R3.L , R7.L );
CHECKREG r0, 0x70000000;
CHECKREG r1, 0x70000000;
CHECKREG r2, 0x70000000;
CHECKREG r3, 0x70000001;
CHECKREG r4, 0x70000001;
CHECKREG r5, 0x70000002;
CHECKREG r6, 0x70000003;
CHECKREG r7, 0x7000F007;


pass
